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IRS21091(S)PbF
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig.1. For proper operation the device should be used within the
recommended conditions. The V S offset rating is tested with all supply biased at a 15 V differential.
Symbol
V B
V S
V HO
V CC
V LO
V IN
DT/SD
T A
Definition
High-side floating supply absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Logic input voltage (IN & DT/SD)
Programmable deadtime and shutdown pin voltage
Ambient temperature
Min.
V S + 10
(Note 1)
V S
10
0
V SS
V SS
-40
Max.
V S + 20
600
V B
20
V CC
V CC
V CC
125
Units
V
° C
Note 1: Logic operational for V S of -5 V to +600 V. Logic state held for V S of -5 V to -V BS . (Please refer to the Design Tip
DT97-3 for more details).
Dynamic Electrical Characteristics
V BIAS (V CC , V BS ) = 15 V, C L = 1000 pF, T A = 25 °C, unless otherwise specified.
Symbol
Definition
Min.
Typ.
Max. Units Test Conditions
ton
toff
tsd
MT
tr
tf
Turn-on propagation delay
Turn-off propagation delay
Shutdown propagation delay
Delay matching, HS & LS turn-on/off
Turn-on rise time
Turn-off fall time
—
—
—
—
—
—
750
200
550
0
100
35
950
280
715
70
220
80
ns
V S = 0 V
V S = 0 V or 600 V
V S = 0 V
DT
MDT
Deadtime: LO turn-off to HO turn-on(DT LO-HO) &
HO turn-off to LO turn-on (DT HO-LO)
Deadtime matching = DT LO - HO - DT HO-LO
400
4
—
—
540
5
0
0
680
6
60
600
μs
ns
R DT = 0 ?
R DT = 200 k ?
R DT = 0 ?
R DT = 200 k ?
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